標題: 6T靜態隨機存取記憶體的設計與特性分析
Design and characterization of 6T SRAM
作者: 林宜緯
Lin, Yi-Wei
莊景德
Chuang, Ching-Te
電子研究所
關鍵字: 靜態隨機存取記憶體;低字元線電壓;資料依存性寫入輔助電路;製程變異;監控電路;靜態雜訊邊界;讀取干擾電壓;Static Random Access Memory;SRAM;Word-Line Under-Drive;Data-Aware Write-Assist;keeper;variaiton;monitor structure;Static Noise Margin;SNM;read disturb voltage;Vread;Vtrip
公開日期: 2010
摘要: 對於幾乎現今所有的電子設備都必須要用到記憶體來當作儲存媒介,於是記憶體的操作效能變掌握了整個系統的操作速度。而因為靜態隨機存取記憶體有著比其他記憶體種類更高的操作速度,靜態隨機存取記憶體通常會被嵌入到系統當中做為儲存媒介或者是快取記憶體。過去20年當中,6T靜態隨機存取記憶體因為有比較緊密的面積以及較高的操作速度而變成靜態隨機存取記憶體設計的主流。然而當製程進行到一百奈米等級之後,製程變異讓6T靜態隨機存取記憶體變得很難存活。先進製程中,6T靜態隨機存取記憶體的讀取和寫入能力都遭受到很大的退化。特別是低壓操作,6T靜態隨機存取記憶體能夠正常運作的機率就又更小了。 為了要使6T靜態隨機存取記憶體能夠正常的在先進製程下工作,我們提出了兩個電路技巧: WL降壓以及資料依存性寫入幫助電路來幫助讀寫能力。而讀寫的雜訊限度都會得到提升。即使在低壓操作,128k位元的6T靜態隨機存取記憶體測試晶片依然能夠操作。此外,我們另外實現了一個監測電路來對6T靜態隨機存取記憶體的變異以及雜訊限度來做特性化。512位元的測試陣列可以提供我們足夠的資料量來分析其統計上的分佈。而陣列的實現方式可以使得到的資訊能夠很接近真實的6T靜態隨機存取記憶體陣列而不是僅僅從模擬上得到。而配合特別設計的的量測方法,可以是我們的解析度達到某個程度,也可以自動化的量測。
Almost the modern electronic devices need memory as its storage media, and the performance of memory always dominant the overall performance of one system. Since SRAM has highest operating speed than other memory family, it is usually embedded into system to storage data or to be a cache. From past decades, standard 6T cell becomes the main stream of SRAM design due to its compact area and high speed. However, as the technology goes beyond 100 nm, variation issue makes 6T SRAM cell hard to survive. The Read/Write ability suffers a serious degradation in advanced technology node. Especially at low voltage, 6T SRAM seem has smaller probability to work. In order to successfully allow 6T SRAM work at advanced process, we proposed two circuit techniques : Word-Line Under-Drive and Data-Aware Write-Assist to increase the read and write ability. Both Read Static Noise Margin and Write Margin would be improved. Even at low voltage operation, the test chip of one 128kb 6T SRAM still function work. Besides, we implement a monitoring structure to characterize the variation factors and noise margin of 6T cells. The test Array has 512kb cells could provide us a sufficient amount sample to analysis the statistical distribution. The Array Based implementation could allow us to get the information about Noise Margin quite close to real SRAM macro rather than get it just from simulation. And with a special designed measure scheme, the measurement resolution could be guaranteed and the measurement could be automatic.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079711665
http://hdl.handle.net/11536/44366
Appears in Collections:Thesis


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