THE DESIGN AND ANALYSIS OF THE SELF-FEEDBACK RATIO-MEMORY CELLULAR NONLINEAR NETWORKS AND THEIR APPLICATIONS IN ASSOCIATIVE MEMORIES
|關鍵字:||細胞式非線性網路;比例式記憶;聯想記憶;權重值;樣板;大鄰近細胞;Cellular Nonlinear Network;Ratio memory;Associative memory;Weight;Template;Large neighboring cell|
|摘要:||本論文的主旨在於闡述類比自回授比例記憶細胞式非線性網路架構配合修正之Habbian演算法在聯想記憶應用之分析與設計。本論文由三個主要部分所組成：(1)自回授比例記憶細胞式非線性網路架構應用於類比聯想記憶之分析與設計; (2)具B或(A和B)樣板之SRMCNN於異聯想記憶應用的設計; (3) 18x18 SRMCNN的超大型積體電路設計及大鄰近層細胞式非線性網路泛用機器之概念設計。
In this thesis, the self-feedback ratio memory analog cellular nonlinear network structure with the modified Hebbian algorithm for associative memory applications are designed and analyzed. The thesis is consist of three main parts: (1) the analysis and design of the structure of the self-feedback ratio memory cellular nonlinear (neural) network (SRMCNN) that applied to the implementation of the analog associative memory; (2) the design of the SRMCNN structure with B (A and B) template for Hetero-associative memory applications; (3) the VLSI implementation for the 18x18 SRMCNN and the conceptual design for the Cellular Nonlinear(Neural) Network Universal Machine with programmable large-neighborhood. Firstly, a learnable cellular nonlinear network (CNN) with space-variant templates, ratio memory (RM), and modified Hebbian learning algorithm is proposed and analyzed. By integrating both the modified Hebbian learning algorithm with the self-feedback function and a ratio memory into CNN architecture, the resultant ratio-memory (RMCNN) is called the self-feedback RMCNN (SRMCNN) which can serve as the associative memory. It can generate the absolute weights and then transform them into the ratioed A-template weights as the ratio memories for recognizing noisy input patterns. Simulation results have shown that with the stronger feature enhancement effect, the SRMCNN under constant leakage current can store and recognize more patterns than the RMCNN. For 18□18 SRMCNN, 93 noisy patterns with a uniform distribution noise level of 0.8 and a variance of normal distribution noise of 0.3 can be learned, stored, and recognized with 100% success rate. The SRMCNN has greater learning and recognition capability when the learned patterns are simpler and the noise is lower. For the learning and recognition of complicated patterns, the allowable pattern number is decreased for a 100% success rate. Simulation results have successfully verified the correct functions and better performance of SRMCNN in the pattern recognition. With high integration capability and excellent pattern association performance, the proposed SRMCNN can be applied in the associative-memory systems for image processing applications. Secondly, the architecture with embedded ratio memory and realized the modified Hebbian learning algorithm in the SRMCNN with B (A and B) template is proposed. It can learn the exemplar patterns and correctly output the recognized patterns for hetero-associative memory applications. The weights of the B template are generated from the product of the desired output pixel value and the nearest five neighboring element as associative memory for all input exemplar patterns. The learned weights are processed in the ratio with the summation of absolute coefficients on the B template. The efficiency of ratio memory is enhanced the feature of pattern. The learned SRMCNN with B template can successful recognized the eight test patterns with white-black noise for auto-associative memory applications. The simulation results of the behavior and function of the SRMCNN with A and B templates for hetero-associative memory applications are demonstrated and analyzed. As the results shown that it was learned and recognized five exemplar patterns and output correctly pattern. The capability of SRMCNN for the more variant exemplar patterns learning and recognition is greatly improved in the hetero-associative memory applications. Finally, the structure of the SRMCNN with B template and the modified Hebbian learning algorithm for auto-associative memory are proposed. The function blocks are implemented in the VLSI circuits for the 0.25 □m 1P5M n-well CMOS technology. The characteristics of the proposed circuits are correctly verified by the HSPICE software. The function of ratio memory for one bit SRMCNN with B template was realized in the VLSI chip and their behavior was observed. The simulation results of the 18x18 SRMCNN behavior and function are demonstrated and analyzed. Thus, the SRMCNN has a great feature that the network can easily implemented in VLSI hardware circuits. The capability of pattern learning and recognition is also improved. The conceptual design for the general architecture of the Large-Neighborhood Cellular Nonlinear (Neural) Network Universal Machine (LN-CNNUM) is described. As the results, the proposed SRMCNN structure used the analog current mode four-quadrant multiplier and two quadrant divider and its applications in associative memories have a great potential for the system-on-a-chip to realize the neural network systems, and the LN-CNNUM structure can simplify the complex of the large-neighborhood interconnections. Further researches will be join in the SRMCNN research in the future, and the embedded ratio memory structure will be used into the analog parallel image processor for the real-time image processing system development.
|Appears in Collections:||Thesis|