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dc.contributor.author張晉誠en_US
dc.contributor.author呂志鵬en_US
dc.contributor.authorLeu, Jih-Perngen_US
dc.date.accessioned2014-12-12T01:29:26Z-
dc.date.available2014-12-12T01:29:26Z-
dc.date.issued2008en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079618504en_US
dc.identifier.urihttp://hdl.handle.net/11536/42307-
dc.description.abstract漏光Mura是指在液晶顯示器(LCD)面板上亮度不均勻的瑕疵。此缺陷源自於Chip-on-Glass (COG) 封裝,由於玻璃基板和矽晶片之間熱膨脹係數的差異,當矽晶片藉由異方性導電薄膜(ACF)與玻璃基板黏合,將會使面板產生翹曲進而導致漏光Mura發生。如今為了滿足顯示器輕量化的需求而使用更薄的玻璃基板將使得漏光Mura缺陷更加嚴重。 本論文利用商用模擬軟體ANSYSTM以有限元素分析法(FEA)建立一3D數值模型來計算LCD面板在經過COG封裝之後所產生的翹曲及應力,並研究其與漏光現象的相關性,進而探討COG封裝所引起之Mura缺陷的成因。接著研究製程溫度及ACF的材料性質還有矽晶片的尺寸大小及排列對Mura缺陷的影響。此外利用量測表面形貌儀器KOSAKA ET4000A,藉由實際的實驗量測來驗證模擬的可靠度。 根據實驗及模擬計算的結果,發現了面板翹曲、應力分佈和漏光現象之間具有高度的相關性。根據分析結果探討可能造成漏光缺陷的根本原因,主要是由於液晶分子的指向矢及在配向膜表面的分子鏈排列方向會被COG封裝所產生的應力所影響而造成。雖然LCD為了輕薄化而將玻璃基板厚度從0.5 mm降至0.3 mm時會產生漏光現象,但藉由將製程溫度由180 oC降至160 oC及採用低楊氏模數的ACF可以將漏光缺陷有效改善或消除。最後本論文提出其它改善漏光現象的方法,例如使用薄化的矽晶片、縮減矽晶片的長度或填充材料(dummification)等方式,並且利用數值模擬來計算其改善漏光的效率。這些方法不僅具有低本成及高可行性的優勢,從模擬計算結果顯示也可以有效解決Mura漏光缺陷。zh_TW
dc.description.abstractLight leakage Mura i.e. the non-uniform brightness in LCDs, occurred upon the completion of chip-on-glass (COG) packaging of silicon IC driver through the thermal bonding of anisotropic conducting film (ACF) resulting from the coefficient of thermal expansion (CTE) mismatch between glass substrate and silicon chips. In mid-size TFT-LCD demanding low weight and high mobility, such Mura defect deteriorated as thinner glass plates were introduced and implanted. In this study, the root-causes of Mura defect induced by COG package were examined and proposed. Then, the impact of thermal bonding temperature and thermo mechanical properties of ACF on Mura defect was investigated. In addition, the effects of dimension and layout of Si chips were also explored. In specific, a 3-D finite element analysis (FEA) model using ANSYSTM was first established to examine the warpage and stress behavior of the glass substrate in order to explore their correlation with light leakage phenomenon. In addition, the simulated warpage data were validated by surface contour measurement tool using surface profiler, KOSAKA ET4000A. Based on experimental data and numerical analysis, the strong relationship among light leakage defect, warpage and stress behavior was found. Besides, the root-cause of light leakage phenomenon was proposed. The Mura may resulted from the re-orientation of the director of the liquid crystal molecules and/or the orientation of the polymer chains on the alignment layer surface induced by the non-uniform stress resulting from COG packaging. Although the light leakage Mura appeared when the thickness of glass substrate was decreased from 0.5 mm to 0.3 mm, reducing ACF thermal bonding temperature from 180 to 160oC or reducing ACF modulus can effectively eliminate Mura defect. Numerical modeling was also utilized to analyze the effectiveness of the dimension and layout of Si chips on Mura improvement. A low cost and effective solution can be realized through thin silicon die, shorter die in length or the use of dummification.en_US
dc.language.isoen_USen_US
dc.subject漏光zh_TW
dc.subject玻璃覆晶封裝zh_TW
dc.subject翹曲zh_TW
dc.subject應力zh_TW
dc.subject有限元素分析法zh_TW
dc.subjectMuraen_US
dc.subjectchip-on-glass (COG)en_US
dc.subjectwarpageen_US
dc.subjectstressen_US
dc.subjectfinite-element-analysis (FEA)en_US
dc.title中尺寸薄膜電晶體液晶顯示器因COG封裝所造成局部翹曲及應力對漏光現象之探討zh_TW
dc.titleEffects of Localized Warpage and Stress on Chip-on-Glass Packaging Induced Light Leakage Phenomenon in mid-size TFT-LCDen_US
dc.typeThesisen_US
dc.contributor.department材料科學與工程學系zh_TW
Appears in Collections:Thesis


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