標題: 應用於系統面板之連續波雷射結晶多晶矽薄膜電晶體之研究
Study on the Continuous Wave Laser Crystallized Polycrystalline Silicon Thin-Film Transistors for the System-on-Panel Applications
作者: 胡明哲
Hu, Ming-Jhe
鄭晃忠
Cheng, Huang-Chung
電子研究所
關鍵字: 薄膜電晶體;低溫多晶矽;二極體倍頻固態連續波雷射;雷射結晶法;thin film transistors;low temperature polycrystalline silicon;diode-pumped solid-state continuous-wave laser;laser crystallization
公開日期: 2010
摘要: 近來低溫多晶矽薄膜電晶體已被廣泛應用於主動式平面顯示器,其是因為低溫多晶矽薄膜電晶體具有高的載子遷移率、低功耗。況且可將周邊驅動電路和功能性電路整合至玻璃面板達成低製作成本、高可靠度與系統面板(System-on-Panel)的目標,在未來應用於三維積體電路(3-D ICs)的實現具有很大的潛力。 要達到絕緣層上矽元件(SOI)特性,本質上來說,可以藉由結晶非晶矽薄膜並增大多晶矽的晶粒大小,減少晶粒缺陷以趨近於單晶矽元件之特性。這些將非晶矽薄膜再結晶為多晶矽的技術包含固相結晶法(SPC)、金屬誘導結晶法(MIC)、準分子雷射結晶法(ELC)等。然而這些技術都有一些缺點,以固相結晶的多晶矽薄膜電晶體需要較長的結晶時間,且有較多的晶粒缺陷,因此導致較差的元件特性。而金屬誘導結晶的多晶矽薄膜,有金屬殘留的問題。在準分子雷射結晶法來說,此技術可有效增加晶粒大小,然而在超級側向成長(SLG)的製程能量區間範圍過窄,以及較差的晶粒大小均勻度是這個技術的主要缺點。因此,本論文主要提出一種二極體泵浦固態(DPSS)連續波雷射結晶(CLC)技術,由於此技術可控制結晶機制為沿著雷射掃描方向之縱向成長 (Longitudinal Growth),因此以此法結晶之多晶矽薄膜電晶體有較佳的載子遷移率。 本論文主要分成兩個部分,在第一部分,藉由控制雷射能量為2.4 W至4.0 W間與雷射掃描速度為20 mm/s 至 60 mm/s,可以在雷射光束中間區域成長大型縱向成長的多晶矽晶粒。然而在雷射光束的邊緣區與過度區仍然有小晶粒與多邊形的晶粒存在,它們分別對應的成長機制為固相結晶型與部分融熔到類超級側向成長型。若多晶矽薄膜電晶體的多晶矽通道屬於小晶粒或多邊形的晶粒,將明顯地降低多晶矽薄膜電晶體的效能,而在雷射光束中間區域所成長的晶粒其機制是全熔融之液相沿著縱向固化的超大晶粒之成長方式。其次,我們也提出多次掃描的方式達成大面積縱向結晶成長,實驗結果顯示晶粒大小可達數十微米、表面粗糙度介於13.308 nm至18.671 nm以及好的結晶性。 在第二部分,我們研究了不同結晶機制下的連續波雷射結晶的多晶矽薄膜電晶體特性。在固相結晶區域,N型多晶矽薄膜電晶體的載子遷移率、次臨界擺幅和臨界電壓,分別為19.4 cm2/V-s、2.72 V/decade和7.93 V。在部分融熔到類超級側向成長區域,N型多晶矽薄膜電晶體的載子遷移率、次臨界擺幅和臨界電壓,分別為86.9 cm2/V-s、1.41 V/decade和0.296 V。在縱向結晶區間,較高效能的N型多晶矽薄膜電晶體的載子遷移率、次臨界擺幅和臨界電壓,分別可達到281 cm2/V-s、0.753 V/decade和-1.17 V。這些結果顯示晶粒越大且結晶性越佳將有較佳之電性。因此,如此簡單的連續波雷射結晶科技對於在未來三維積體電路應用上其發展將是不容小懼的。
Low-temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) have been widely used in active matrix flat panel displays (AMFPDs), since they feature in high field-effect mobility and low power consumption. Moreover, the peripheral driver circuits, controller ICs and functional circuits can be integrated into glass substrates by utilizing LTPS-TFTs to achieve the goal of low cost, high reliability and System-on-Panel (SOP). We can foresee that LTPS-TFTs have great potential in the realization of 3-D ICs in the near future. In tradition, reducing the defect states via enlarging poly-Si grain size is an intrinsic approach to single crystal Si material, which leads to the silicon-on-insulator-like (SOI-like) device performance. There are several technologies to enlarge the grain size, including solid phase crystallization (SPC) metal induced crystallization (MIC), and excimer laser irradiation crystallization (ELC). These methods could be concluded that the a-Si thin films are recrystallized into polycrystalline silicon thin film by applying additional energy. However, these technologies had some drawbacks as below: First, the SPC TFTs suffer a lot of intra-granular defects, which results in a bad performance and the long annealing time will limit the throughput to fabricate poly-Si thin film. Second, the metal induced crystallization (MIC) technology suffers from metal contamination incorporated into poly-Si thin film and the metal contamination will result in poor TFT performance. Third, although the excimer laser irradiation crystallization (ELC) technology is an useful technology to enlarge the grain size, there are still some disadvantages such as narrow laser process window for SLG and poor grain-size uniformity. In this thesis, therefore, we proposed a method, which is so called Diode-Pumped Solid-State (DPSS) Continuous Wave Laser-Crystallization (CLC). With the benefits of this longitudinal growth crystallization method, the poly-Si TFTs with high field-effect mobility have been fabricated. At the first part, a new and simple CW laser crystallization is proposed to produce large longitudinally grown grains in the center region of the laser beam crystallized poly-Si via controlling the laser powers and the laser scanning speeds. However there are still small grains and polygonal grains in the edge and the transition region, which were SPC and PMG to SLG-like respectively, in spite of enlarging the laser powers or reducing the laser scanning speeds due to the Gaussian laser energy distribution. The small and polygonal grains in the channel region will deteriorate the performances of the TFTs. Therefore, multi-scan (overlapping method) scheme was proposed to achieve large area of longitudinal crystallization. According to the experimental results, the directionally longitudinal grains with tens of micrometer, flat surface morphology, and excellent crystallinity were achieved without damages to the quartz substrates. In the second part, the electrical characteristics of the continuous wave laser crystallized polycrystalline silicon thin-film transistors were also studied, . In the SPC regime, the equivalent field-effect mobility, subthreshold swing, and threshold voltage were 19.4cm2/V-s, 2.72V/decade, and 7.93V, respectively. In PMG to SLG-like regime, the equivalent field-effect mobility, subthreshold swing, and threshold voltage were 86.9cm2/V-s, 1.41V/decade, and 0.296V, respectively. In longitudinal growth regime, high performance CLC poly-Si TFTs with equivalent field-effect mobility, subthreshold swing , and threshold voltage exceeding 281cm2/V-s, 0.753 V/decade, and -1.17V, respectively for n-channel devices have been fabricated without any hydrogenation treatment. It reflects that the larger grains with better crystallinity will possess the better electrical characteristics. Moreover such simple CW laser crystallization technique is promising for the applications in the future 3D- ICs.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079611548
http://hdl.handle.net/11536/41682
Appears in Collections:Thesis


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