Title: 多晶矽奈米線環繞式閘極薄膜電晶體之研究
Study of Gate-All-Around Poly-Si Nanowire Thin Film Transistor
Authors: 黃柏鈞
Huang, Po-Chun
Sheu, Jeng-Tzong
Keywords: 薄膜電晶體;環繞式閘極;矽奈米線;TFT;GAA;Si nanowire
Issue Date: 2011
Abstract: 在本論文中探討了一些技術來達到在系統面板上對高效能的低溫多晶矽薄膜電晶體的需求。主要的概念是利用多重閘極(multiple gate)的結構配合氨電漿(NH3 plasma)的處理來改善元件特性。本論文探討了多晶矽奈米線環繞式閘極薄膜電晶體(gate-all-around polycrystalline silicon nanowire thin-film transistors)的特性。和傳統的薄膜電晶體相比,提出的環繞式閘極薄膜電晶體對氨電漿處有更好的效率並展現出了優越的特性,如較低的臨界電壓(-0.38 V)、陡翹的次臨界斜率(114 mV/dec)、高電流開關比(>108)、和較低的汲極引發能障降低效應(13 mV/V)。此外由於低溫多晶矽薄膜電晶體本身材料的限制,元件和元件間的特性差異變的特別嚴重,而這也限制了其在系統面板上的應用。針對這個問題,本論文也探討了多重閘極和多通道結構對元件變異性的影響。由實驗結果發現除了閘極結構對變異性會有影響,結合增加通道的數目可以更進一步有效的降低元件間的電性差異。由本實驗發現當利用環繞式閘極結構並配合16個以上的通道可以使元件特性有最低的標準差(臨界電壓和次臨界斜率的最低標準差分別是30 mV和11.4 mV/dec)。此外,本研究也實現了有記憶體功能的SONOS (Silicon-Oxide -Nitride-Oxide-Silicon)型式的環繞式閘極薄膜電晶體。由於角落電場效應(corner effect), 提出的SONOS型式的環繞式閘極薄膜電晶體在記憶體的寫入抺除特性上有良好的表現。其中在寫入特性上,閘極電壓16 V且操作時間16 μs下可以有1.27 V的臨界電壓變化。而在抺除特性上,可以在閘極電壓-17 V且操作時間1 ms下可以有0.5 V的臨界電壓變化。
In this work, several techniques are studied to developed high-performance LTPS TFTs which is required for system-on-panel (SOP) applications. The concept is adopted the multiple gate, and NH3 plasma passivation to improve performance. We had investigated the characteristics of gate-all-around (GAA) polycrystalline silicon nanowire (NW) thin-film transistors (TFTs). Compare to conventional planar TFT, the GAA NW TFT exhibits the superior performance and more efficiency for NH3 plasma treatment. The proposal GAA NW TFT exhibits a great improvement in performance including lower threshold voltage (-0.38 V), a steeper sub-threshold swing (114 mV/dec), a higher On/Off current ratio (>108), and a virtual absence of drain-induced barrier lowing (13 mV/V). The device-to-device variation is a serious problem in LTPS TFT and its limits the design rule in SOP application. We also addressed the variation immunity of different multiple gate structure and multiple channel configuration. In this experiment, not only the gate configuration but also the presence of multiple channels efficiently reduced the variation in the electrical characteristics. The device adopted with surrounding gate and featuring up to 16 channel exhibits the best performance and minimized standard deviation (30 mV and 11.4 mV/dec of threshold voltage and subthreshold swing, respectively). Finally, the GAA SONOS TFT with memory function had been realized. Due to the presence of corner effect, the GAA SONOS TFT brings the advantage in programming and erasing characteristics. The fast programming (t = 10 μs, Vg = 16 V) and erasing (t = 1 ms, Vg = –17 V) achieved threshold voltage shifts of 1.27 and 0.6 V, respectively.  
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