標題: A new cryogenic CMOS readout structure for infrared focal plane array
作者: Hsieh, CC
Wu, CY
Sun, TP
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: CMOS integrated circuit;cryogenic electronics;focal plane array;readout circuit
公開日期: 1-八月-1997
摘要: A new current readout structure for the infrared (IR) focal-plane-array (FPA), called the switch-current integration (SCI) structure, is presented in this paper. By applying the share-buffered direct-injection (SBDI) biasing technique and off focal-plane-array (off-FPA) integration capacitor structure, a high-performance readout interface circuit for the IR FPA is realized with a pixel size of 50 x 50 mu m(2). Moreover, the correlated double sampling (CDS) stage and dynamic discharging output stage are utilized to improve noise and speed performance of the readout structure under low power dissipation. An experimental SCI readout chip has been designed and fabricated in 0.8-mu m double-poly-double-metal (DPDM) n-well CMOS technology. The measurement results of the fabricated readout chip at 77 K with 4 and 8 V supply voltages have successfully verified both the readout function and the performance improvement. The fabricated chip has a maximum charge capacity of 1.12 x 10(8) electrons, a maximum transimpedance of 1 x 10(9) Omega, and ae active power dissipation of 30 mW. The proposed CMOS SCI structure can be applied to various cryogenic IR FPA's.
URI: http://dx.doi.org/10.1109/4.604075
http://hdl.handle.net/11536/384
ISSN: 0018-9200
DOI: 10.1109/4.604075
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 32
Issue: 8
起始頁: 1192
結束頁: 1199
顯示於類別:期刊論文


文件中的檔案:

  1. A1997XL40400004.pdf