標題: 整合於H.264/AVC HDTV解碼器的無失真嵌入式壓縮方法
A Lossless Embedded Compression Codec Engine Integrated with H.264/AVC HDTV Decoder
作者: 洪建州
Chien-Chou Hung
李鎮宜
Chen-Yi Lee
電機學院IC設計產業專班
關鍵字: 嵌入式壓縮;無失真壓縮;H.264/AVC;embedded compression;lossless compression
公開日期: 2007
摘要: 在本論文中,我們提出一個有效的無失真嵌入式壓縮器,在無損畫面品質的要求下來減少對系統頻寬的存取。 所提出的演算法能夠利用畫面預測的結果來選擇三種掃描模式,以提高DPCM的壓縮效能,經過DPCM所產生的預測錯誤將會被更進一步地利用Golomb-Rice編碼方法來壓縮;為了避免被壓縮的檔案無限制的擴展,每一個被壓縮的分割檔案必須小於128位元大小的限制。如果碼長預測器發現分割檔案違反了我們的限制,它將會直接傳送原來的像素值到系統匯流排而不壓縮它。根據實驗的結果,所提出的演算法能夠實現超過2的平均壓縮率而且畫面品質不會被犧牲。 所提出的硬體架構能夠工作在每秒30張畫面的HDTV系統裡而工作頻率為120MHz。利用UMC 0.18um的製程技術,所提出的硬體架構只需要22.5K的邏輯閘數目而功率消耗為3.3mW。與所減少的系統頻寬存取相比較,所消耗的面積與功率是相當的小。
In this thesis, we propose an efficient lossless embedded compression codec engine to reduce the system bus access without quality degradation. The proposed algorithm can make use of the intra prediction results to choose the three scan modes that could enhance compression efficiency of DPCM. The prediction errors after DPCM will furthermore be compressed by Golomb-Rice coding. In order to prevent infinite expansion of the compressed bitstream, the compressed segment must be less than 128 bits limitation. If the code length predictor finds that the compressed segment violates our constraint, it will transfer original pixels to the system bus. According to the experiment results, the proposed algorithm can achieves the average of compression ratio more than 2 and no quality will be sacrificed. The proposed architecture can decode at HDTV@30fps with 120MHz clock rate. Based on UMC 0.18 um CMOS technology, the proposed architecture needs 22.5K gate counts and power consumption is 3.3mW. Compared with the amount of the reduced system bus access, the area and power overhead is small.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009495524
http://hdl.handle.net/11536/38000
Appears in Collections:Thesis