標題: SINGLE-FAULT FAULT-COLLAPSING ANALYSIS IN SEQUENTIAL LOGIC-CIRCUITS
作者: CHEN, JE
LEE, CL
SHEN, WZ
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-十二月-1991
摘要: This paper studies single-fault fault collapsing in sequential logic circuits. Two major phenomena, self-hiding (SH) and delayed reconvergence (DR), which arise from the existence of feedback paths and storage elements in sequential circuits, are analyzed and found to cause the dominance relationship which is valid in combinational circuits but no longer valid in sequential circuits. A fault-collapsing procedure is proposed to collapse faults in sequential circuits. It first collapses faults in the non-SAD (self-hiding and delayed-reconvergence) gates of the combinational part of the sequential circuit and then further collapses faults by identifying the prime fan-out branches. Finally, it collapses faults in feedback lines. The collapsed faults constitute a sufficient representative set of prime faults. This procedure has been applied to collapse faults for 31 benchmark sequential circuits [1] and the number of faults has collapsed to 43% of the original number.
URI: http://dx.doi.org/10.1109/43.103505
http://hdl.handle.net/11536/3618
ISSN: 0278-0070
DOI: 10.1109/43.103505
期刊: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Volume: 10
Issue: 12
起始頁: 1559
結束頁: 1568
顯示於類別:期刊論文


文件中的檔案:

  1. A1991GP77400009.pdf