標題: DUAL-STATE SYSTOLIC ARCHITECTURES FOR UP DOWNDATING RLS ADAPTIVE FILTERING
作者: HSIEH, SF
LIU, KJR
YAO, K
電信工程研究所
Institute of Communications Engineering
公開日期: 1-Jun-1992
摘要: We propose a dual-state systolic structure to perform joint up/down-dating operations encountered in windowed recursive least-squares (RLS) estimation problems. It is based on successively performing Givens rotations for updating and hyperbolic rotations for downdating. Due to data independency, a series of Givens and hyperbolic rotations can be interleaved and parallel processing can be achieved by alternatively performing updating and downdating both in time and space. This flip-flop nature of up/down-dating characterizes the feature of the dual-state systolic triarray. Efficient implementation on the evaluation of optimal residuals is also considered. This systolic architecture is promising for the VLSI implementation of fixed size sliding-window recursive least-squares estimations.
URI: http://dx.doi.org/10.1109/82.145296
http://hdl.handle.net/11536/3398
ISSN: 1057-7130
DOI: 10.1109/82.145296
期刊: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
Volume: 39
Issue: 6
起始頁: 382
結束頁: 385
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  1. A1992JD57100007.pdf