標題: Argon ion-implantation on polysilicon or amorphous-silicon for boron penetration suppression in p(+) pMOSFET
作者: Lee, LS
Lee, CL
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Ar implantation;boron penetration;p(+) pMOSFET
公開日期: 1-八月-1998
摘要: In this paper, a technique to use Ar ion-implantation on the p(+)a-Si or poly-Si gate to suppress the boron penetration in p(+) pMOSFET is proposed and demonstrated. An Ar-implantation of a dose over 5 x 10(15) cm(-2) is shown to be able to sustain 900 degrees C annealing for 30 min for the gate without having the underlying gate oxide quality degraded, It is believed to be due to gettering of fluorine, then consequently boron, by the bubble-like defects created by the Ar implantation in the p+ gate region to reduce the B penetration. Excellent electrical characteristics like dielectric breakdown (E-bd), interface state density (D-it), and charge-to-breakdown (Q(bd)) On the gate oxide are obtained. The technique is compatible to the present CMOS process. The submicron pMOSFET fabricated by applying this technique exhibit better subthreshold characteristics and hot carrier immunity.
URI: http://dx.doi.org/10.1109/16.704373
http://hdl.handle.net/11536/32462
ISSN: 0018-9383
DOI: 10.1109/16.704373
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 45
Issue: 8
起始頁: 1737
結束頁: 1744
顯示於類別:期刊論文