標題: A study of tilt angle effect on Halo PMOS performance
作者: Su, JG
Wong, SC
Huang, CT
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-九月-1998
摘要: The Halo structure is usually adopted in deep submicrometer MOS devices for punchthrough prevention. The tilt angle of the Halo implant determines the dopant distribution which induces anti-punchthrough operation. In this paper, we investigate the impact of the tilt angle on the Halo PMOS device performance via two-dimensional (2D) simulations. We find that the ratio of on-current to off-current is constant for all tilt angles of Halo implant, implying an equivalent DC performance for all tilt angles. The equivalence can be traced back to a self compensation between the body factor and source resistance. The result :implies that a low tilt angle should be adopted for Halo devices, for it gives a small threshold voltage and thus a high noise margin. The methodology used in analyzing body factor and source resistance can also be applied to analyze other devices. (C) 1998 Elsevier Science Ltd. All rights reserved.
URI: http://hdl.handle.net/11536/32433
ISSN: 0026-2714
期刊: MICROELECTRONICS AND RELIABILITY
Volume: 38
Issue: 9
起始頁: 1503
結束頁: 1512
顯示於類別:期刊論文


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  1. 000077017500019.pdf