標題: Scan-Cell Reordering for Minimizing Scan-Shift Power Based on Nonspecified Test Cubes
作者: Wu, Yu-Ze
Chao, Mango C. -T.
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Algorithms;Design;Scan testing;DFT;low-power testing
公開日期: 1-Nov-2010
摘要: This article presents several scan-cell reordering techniques to reduce the signal transitions during the test mode while preserving the don't-care bits in the test patterns for a later optimization. Combined with a pattern-filling technique, the proposed scan-cell reordering techniques can utilize both high response correlations and pattern correlations to simultaneously minimize scan-out and scan-in transitions. Those scan-shift transitions can be further reduced by selectively using the inverse connections between scan cells. In addition, the trade-off between routing overhead and power consumption can also be controlled by the proposed scan-cell reordering techniques. A series of experiments are conducted to demonstrate the effectiveness of each of the proposed techniques individually.
URI: http://dx.doi.org/10.1145/1870109.1870119
http://hdl.handle.net/11536/32040
ISSN: 1084-4309
DOI: 10.1145/1870109.1870119
期刊: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS
Volume: 16
Issue: 1
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結束頁: 
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