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dc.contributor.authorYeh, CFen_US
dc.contributor.authorChen, TJen_US
dc.contributor.authorLiu, Cen_US
dc.contributor.authorShao, JQen_US
dc.contributor.authorCheung, NWen_US
dc.date.accessioned2014-12-08T15:47:26Z-
dc.date.available2014-12-08T15:47:26Z-
dc.date.issued1998-11-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.728903en_US
dc.identifier.urihttp://hdl.handle.net/11536/31804-
dc.description.abstractThis work applied, for the first time, plasma immersion ion implantation (PIII) for source/drain doping on low-temperature processed polysilicon thin-film transistors (poly-Si TFT's), Experimental results indicate that PIII doping can provide adequate dopant concentration and junction depth for source/drain. In addition, H-2-diluted phosphorus pill can promote dopant activation more efficiently during RTA at 600 degrees C than with conventional ion implantation (II) technology. The excellent characteristics of PIII doped poly-Si TFT's resemble those of conventional II doped ones.en_US
dc.language.isoen_USen_US
dc.titleApplication of plasma immersion ion implantation doping to low-temperature processed poly-Si TFT'sen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/55.728903en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume19en_US
dc.citation.issue11en_US
dc.citation.spage432en_US
dc.citation.epage434en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000076720600012-
dc.citation.woscount3-
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