標題: EVENT-DRIVEN INCREMENTAL TIMING FAULT SIMULATOR
作者: JOU, SJ
CHIOU, SH
TAO, YS
SHEN, WZ
電控工程研究所
Institute of Electrical and Control Engineering
關鍵字: FAULT SIMULATION;MOS DEVICES
公開日期: 1-Feb-1993
摘要: An efficient simulator of multiple sets of multiple faults, with electrical timing information for an MOS IC. is presented. The physical faults in a real circuit are modelled more realistically by the node-short, line-open and threshold voltage degradation faults at the transistor level. On using event-driven, selective trace and mixed incremental-in-space. signal and time simulation techniques. the simulation results show that it is superior to other approaches in speed, extra memory used, and precision. Moreover, this simulator is suitable for parallel simulation in a multiprocessor system.
URI: http://hdl.handle.net/11536/3136
ISSN: 0956-3768
期刊: IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS
Volume: 140
Issue: 1
起始頁: 45
結束頁: 54
Appears in Collections:Articles


Files in This Item:

  1. A1993LF60600007.pdf