標題: A CMOS delta-sigma true RMS converter
作者: Wey, WS
Huang, YC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: CMOS analog integrated circuits;delta-sigma modulation;indirect charge transfer filter;multiplier-divider;rms-to-dc converter;switched-capacitor circuits;true rms converter
公開日期: 1-二月-2000
摘要: Conventionally, monolithic electronics true rms converters are constructed by bipolar circuitry, This paper describes a new architecture based on delta-sigma (Delta Sigma) modulation to realize a low-cost rms converter in CMOS technologies, especially intended for handheld digital multimeters. The signal-to-quantization noise ratio as well as transfer characteristics of this architecture have been deduced to obtain initial design parameters. The use of an indirect charge transfer technique makes the converter gain depend only on an on-chip capacitor ratio, reducing gain drift and offering good gain accuracy, Measured results show that this converter achieves a signal-to-noise ratio of 88 dB and a relative error of +/-0.2% for arbitrary inputs with a signal crest factor up to three. The signal bandwidth exceeds 50 kHz, and the full-scale input range is greater than 0.4 V-rms. Without trimming and calibration, this converter has an absolute gain error less than +/-0.4%. This chip is fabricated in a 0.8-mu m double-poly; double-metal CMOS process and occupies active area of 1 mm(2).
URI: http://dx.doi.org/10.1109/4.823450
http://hdl.handle.net/11536/30788
ISSN: 0018-9200
DOI: 10.1109/4.823450
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 35
Issue: 2
起始頁: 248
結束頁: 257
顯示於類別:期刊論文


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