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dc.contributor.authorCHIN, JHen_US
dc.contributor.authorWU, JSen_US
dc.contributor.authorYOUNG, RSen_US
dc.date.accessioned2014-12-08T15:04:33Z-
dc.date.available2014-12-08T15:04:33Z-
dc.date.issued1993-05-01en_US
dc.identifier.issn0022-0817en_US
dc.identifier.urihttp://hdl.handle.net/11536/3038-
dc.description.abstractChip congestion is a long time bottleneck in deep hole drilling. This paper addresses the problem of chip state monitoring in single-edge deep hole drilling by computer simulation and experimental analysis. Two phenomenological models were proposed to interpret the physics of chip discharging in normal and congested states, respectively. Length and diameter of the chip are chosen to represent the geometric features of the chip, and the formation of a chip signal is discussed. Based on the two models different types of chips are used to simulate the monitoring process. Computer simulation shows that the normal chip discharging in a real drilling process can be interpreted by the proposed slug flow model. Also, the experiments with cylindrical form chips confirms model II proposed for a congested chip state in which the diametral effect develops due to chip congestion. The experimental analyses also find out the dependence of pressure signals on the various parameters of chips as well as the cutting process.en_US
dc.language.isoen_USen_US
dc.titleTHE COMPUTER-SIMULATION AND EXPERIMENTAL-ANALYSIS OF CHIP MONITORING FOR DEEP HOLE DRILLINGen_US
dc.typeArticleen_US
dc.identifier.journalJOURNAL OF ENGINEERING FOR INDUSTRY-TRANSACTIONS OF THE ASMEen_US
dc.citation.volume115en_US
dc.citation.issue2en_US
dc.citation.spage184en_US
dc.citation.epage192en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department機械工程學系zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Mechanical Engineeringen_US
dc.identifier.wosnumberWOS:A1993LD99500004-
dc.citation.woscount6-
Appears in Collections:Articles