|標題:||Copper voids improvement for the copper dual damascene interconnection process|
|作者:||Wang, T. C.|
Wang, Y. L.
Hsieh, T. E.
Chang, S. C.
Cheng, Y. L.
Department of Materials Science and Engineering
|關鍵字:||semiconductors;thin films;defects;electrical properties|
|摘要:||The mechanism of copper (Cu) voids formation from electro-chemical plating (ECP) followed by Cu chemical mechanical polishing (CMP) are studied in Cu dual-damascene interconnection. The formation of Cu voids at metal lines is the main problem that causes not only the failure of via-induced metal-island corrosion but also yield loss. The galvanic theory and Cu lifting mechanism are proposed to explain the dependence of Cu-void performance on the Cu grain size and the benzotriazole (BTA, C6H5N3) flow rates. In the integration process of Cu interconnects, it is found that the smaller Cu grain size in ECP conditions and less BTA flow rate in CMP processes cannot only reduce the number of Cu voids but also improve the water yield. (c) 2007 Elsevier Ltd. All rights reserved.|
|期刊:||JOURNAL OF PHYSICS AND CHEMISTRY OF SOLIDS|
|Appears in Collections:||Conferences Paper|
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