標題: Characterization of hot-hole injection induced SILC and related disturbs in flash memories
作者: Yih, CM
Ho, ZH
Liang, MS
Chung, SS
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: flash memory;gate-disturb;read-disturb;SILC
公開日期: 1-二月-2001
摘要: In this paper, we have proposed a new method for the study of disturb failure mechanisms caused by stress induced leakage current (SILC) in source-side erased flash memories. This method is able to directly separate the individual components of SILC due to either carrier charging/disharging in the oxide or the positive charge/trap assisted electron tunneling into the floating gate, In addition, the present method is very sensitive with capability of measuring ultralow current (<10(-19) A), Results show that, at low oxide field, the disturb is mainly contributed by the so-called charging/disharging of carriers into/from the oxide due to the capacitance coupling effect. While at high oxide field, the positive charge/trap assisted electron tunneling induced floating-gate charge variation is the major cause of disturb failure.
URI: http://dx.doi.org/10.1109/16.902731
http://hdl.handle.net/11536/29864
ISSN: 0018-9383
DOI: 10.1109/16.902731
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 48
Issue: 2
起始頁: 300
結束頁: 306
顯示於類別:期刊論文


文件中的檔案:

  1. 000167017400018.pdf