標題: Characterization and modeling of edge direct tunneling (EDT) leakage in ultrathin gate oxide MOSFETs
作者: Yang, KN
Huang, HT
Chen, MJ
Lin, YM
Yu, MC
Jang, SM
Yu, DCH
Liang, MS
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-Jun-2001
摘要: This paper examines the edge direct tunneling (EDT) of electron from n(+) polysilicon to underlying n-type drain extension in off-state n-channel MOSFET's having ultrathin gate oxide thicknesses (1.4-2.4 mm), It is found that for thinner oxide thicknesses, electron EDT is more pronounced over the conventional gate-induced-drain-leakage (GIDL), bulk band-to-band tunneling (BTBT), and gate-to-substrate tunneling, and as a result, the induced gate and drain leakage is better measured per unit gate width. A physical model is for the first time derived for the oxide field fox at the gate edge by accounting for electron subband in the quantized accumulation polysilicon surface. This model relates fox to the gate-to-drain voltage, oxide thickness, and doping concentration of drain extension, Once fox is known, an existing DT model readily reproduces EDT I-V consistently and the tunneling path size extracted falls adequately within the gate-to-drain overlap region. The ultimate oxide thickness limit due to EDT is projected as well.
URI: http://dx.doi.org/10.1109/16.925242
http://hdl.handle.net/11536/29586
ISSN: 0018-9383
DOI: 10.1109/16.925242
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 48
Issue: 6
起始頁: 1159
結束頁: 1164
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