標題: Enhanced degradation in polycrystalline silicon thin-film transistors under dynamic hot-carrier stress
作者: Chang, KM
Chung, YH
Lin, GM
Deng, CG
Lin, JH
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: channel shortening effect;intra-grain bulk states;polysilicon thin-film transistors (poly-Si TFTs);tail states;transconductance (G(m) (max))
公開日期: 1-Oct-2001
摘要: We address the mechanisms responsible for the enhanced degradation in the polysilicon thin-film transistors under dynamic hot-carrier stress. Unlike the monotonic decrease of maximum transconductance (G(m max)) in static stress, G(m max) in dynamic stress is initially increased due to the channel shortening effect by holes injected into the gate oxide near the drain region and then decreased due to tail states generation at the gate oxide/channel interface and grain boundaries. The threshold voltage variations are dominated by two degradation mechanisms: 1) breaking of weak bonds and 2) breaking of strong bonds to obey the power-time dependence law with a slope of 0.4. The degradation of the sub-threshold slope is attributed to intra-grain bulk states generation.
URI: http://dx.doi.org/10.1109/55.954916
http://hdl.handle.net/11536/29358
ISSN: 0741-3106
DOI: 10.1109/55.954916
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 22
Issue: 10
起始頁: 475
結束頁: 477
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