標題: ON THE DESIGN AUTOMATION OF THE MEMORY-BASED VLSI ARCHITECTURES FOR FIR FILTERS
作者: LEE, HR
JEN, CW
LIU, CM
資訊工程學系
電子工程學系及電子研究所
Department of Computer Science
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-八月-1993
摘要: The design automation of the memory-based VLSI architectures for FIR filters is investigated. This paper intends to give a thorough discussion about the design space and schemes for this subject. The discussed topics include the conditions leading to efficient memory replacement, the formulation space of FIR filters, the considerations in architecture design, and the methods to evaluate architectures. With the research results of these topics, we present a parameterized memory-based architecture and the hardware-speed evaluation formulae. This architecture is characterized by three parameters into which various memory-based architectures can be generated by substituting different values. The presented formulae are formulated as functions of the three parameters and implementation technology. Using the evaluation formulae and through the parameterized architecture, an area-minimized architecture can be synthesized under a speed specification. Based on these results, we develop an automatic synthesis tool with an illustrating example.
URI: http://dx.doi.org/10.1109/30.234644
http://hdl.handle.net/11536/2914
ISSN: 0098-3063
DOI: 10.1109/30.234644
期刊: IEEE TRANSACTIONS ON CONSUMER ELECTRONICS
Volume: 39
Issue: 3
起始頁: 619
結束頁: 629
顯示於類別:期刊論文


文件中的檔案:

  1. A1993LY44600070.pdf