標題: AN AREA TIME-EFFICIENT MOTION ESTIMATION MICRO CORE
作者: CHEN, SG
電子工程學系及電子研究所
電子與資訊研究中心
Department of Electronics Engineering and Institute of Electronics
Microelectronics and Information Systems Research Center
公開日期: 1-八月-1993
摘要: An efficient micro architecture for motion estimation is proposed. It achieves better time and area performance than the existing structures. Through pipelining and effective manipulation of 2's complement arithmetic, the adder complexity is kept to its lowest, while speed for a combined subtraction, absolution and accumulation operations is made as fast as a carry-save addition (CSA). Together with a new DCT algorithm, the micro structure is further expanded and tailored to facilitate efficient execution of other video operations like DCT and filtering operations.
URI: http://dx.doi.org/10.1109/30.234597
http://hdl.handle.net/11536/2912
ISSN: 0098-3063
DOI: 10.1109/30.234597
期刊: IEEE TRANSACTIONS ON CONSUMER ELECTRONICS
Volume: 39
Issue: 3
起始頁: 298
結束頁: 303
顯示於類別:期刊論文


文件中的檔案:

  1. A1993LY44600023.pdf