標題: Stacked-NMOS triggered silicon-controlled rectifier for ESD protection in high/low-voltage-tolerant I/O interface
作者: Ker, MD
Chuang, CH
電機學院
College of Electrical and Computer Engineering
關鍵字: electrostatic discharge (ESD);ESD protection;mixed-voltage I/O buffer;silicon-controlled rectifier (SCR)
公開日期: 1-六月-2002
摘要: A stacked-NMOS triggered silicon-controlled rectifier (SNTSCR) is proposed as the electrostatic discharge (ESD) clamp device to protect the mixed-voltage I/O buffers of CMOS ICs. This SNTSCR device is fully compatible to general CMOS processes without using the thick gate oxide to overcome the gate-oxide reliability issue. ESD robustness of the proposed SNTSCR device with different layout parameters has been investigated in a 0.35-mum CMOS process. The HBM ESD level of the mixed-voltage I/O buffer with the stacked-NMOS channel width of 120 mum can be obviously improved from the original similar to2 kV to be greater than 8 kV by this SNTSCR device with a device dimension of only 60 mum/0.35 mum.
URI: http://dx.doi.org/10.1109/LED.2002.1004236
http://hdl.handle.net/11536/28779
ISSN: 0741-3106
DOI: 10.1109/LED.2002.1004236
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 23
Issue: 6
起始頁: 363
結束頁: 365
顯示於類別:期刊論文


文件中的檔案:

  1. 000175844800023.pdf