標題: Impacts of gate structure on dynamic threshold SOI nMOSFETs
作者: Lo, WC
Chang, SJ
Chang, CY
Chao, TS
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: dynamic threshold MOS (DTMOS);H-gate;silicon-on-insulator (SOI);T-gate
公開日期: 1-八月-2002
摘要: The effects of different substrate-contact structures (T-gate and H-gate) dynamic threshold voltage silicon-on-insulator (SOI) nMOSFETs (DTMOS) have been investigated. It is found that H-gate structure devices have higher driving current than T-gate under DTMOS-mode operation. This is because H-gate SOI devices have larger body effect factor (gamma), inducing a lager reduction of threshold voltage. Besides, it is found that drain-induced-barrier-lowering (DIBL) is dramatically reduced for both T-gate and H-gate structure devices when devices are operated under DTMOS-mode.
URI: http://dx.doi.org/10.1109/LED.2002.801334
http://hdl.handle.net/11536/28617
ISSN: 0741-3106
DOI: 10.1109/LED.2002.801334
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 23
Issue: 8
起始頁: 497
結束頁: 499
顯示於類別:期刊論文


文件中的檔案:

  1. 000177207300018.pdf