標題: EFFICIENT OUTPUT PHASE ASSIGNMENT ALGORITHM FOR PLAS
作者: HSU, WJ
SHEN, WZ
電控工程研究所
Institute of Electrical and Control Engineering
關鍵字: LOGIC OPTIMIZATION;LOGIC ARRAYS;PHASE ASSIGNMENT
公開日期: 1-Oct-1993
摘要: To implement a multiple output function, one has the option to realise each output with either true logic or complementary logic following with an inverter. In this paper, we propose an efficient algorithm to solve this output phase assignment problem for PLA implementation. Instead of using the double-phase cover minimisation approach, we use a property-checking procedure to estimate the cost of assignments. With the estimated costs, an assignment with minimum cost is chosen. The experimental results show that the proposed algorithm can obtain excellent assignment compared with other approaches.
URI: http://hdl.handle.net/11536/2833
ISSN: 0956-3768
期刊: IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS
Volume: 140
Issue: 5
起始頁: 360
結束頁: 366
Appears in Collections:Articles


Files in This Item:

  1. A1993MG19600008.pdf