標題: A study of parasitic resistance effects in thin-channel polycrystalline silicon TFTs with tungsten-clad source/drain
作者: Zan, HW
Chang, TC
Shih, PS
Peng, DZ
Kuo, PY
Huang, TY
Chang, CY
Liu, PT
電子工程學系及電子研究所
光電工程學系
Department of Electronics Engineering and Institute of Electronics
Department of Photonics
關鍵字: parasitic resistance;poly-Si TFT;S/D resistance;selective tungsten;thin channel
公開日期: 1-Aug-2003
摘要: With selectively-deposited tungsten film grown on source/drain regions, the parasitic source/drain resistance of thin-channel polycrystalline silicon (poly-Si) thin film transistors can be greatly reduced, leading to the improvement of device driving ability. After extracting the parasitic resistance from characteristics of devices with different channel length, the influences of parasitic resistance on device performances were discussed. A physically-based equation containing the parasitic resistance effects was derived to explain the behavior of linear transconductance under high gate voltage. Good agreements were found between calculated and measured data for both the thin-channel devices with or without tungsten-clad source/drain structure.
URI: http://dx.doi.org/10.1109/LED.2003.815160
http://hdl.handle.net/11536/27691
ISSN: 0741-3106
DOI: 10.1109/LED.2003.815160
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 24
Issue: 8
起始頁: 509
結束頁: 511
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