標題: Design of Mixed-Voltage-Tolerant Crystal Oscillator Circuit in Low-Voltage CMOS Technology
作者: Wang, Tzu-Ming
Ker, Ming-Dou
Liao, Hung-Tai
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Crystal oscillator;gate-oxide reliability;mixed-voltage I/O
公開日期: 1-May-2009
摘要: In the nanometer-scale CMOS technology, the gate-oxide thickness has been scaled down to provide higher operating speed with lower power supply voltage. However, regarding compatibility with the earlier defined standards or interface protocols of CMOS ICs in a microelectronics system, the chips fabricated in the advanced CMOS processes face the gate-oxide reliability problems in the interface circuits due to the voltage levels higher than normal supply voltage (1 x VDD) required by earlier applications. As a result, mixed-voltage I/O circuits realized with only thin-oxide devices had been designed with advantages of less fabrication cost and higher operating speed to communicate with the circuits at different voltage levels. In this paper, two new mixed-voltage-tolerant crystal oscillator circuits realized with low-voltage CMOS devices are proposed without suffering the gate-oxide reliability issues. The proposed mixed-voltage crystal oscillator circuits, which are one of the key I/O cells in a cell library, have been designed and verified in a 90-min 1-V CMOS process, to serve 1-V/2-V tolerant mixed-voltage interface applications.
URI: http://dx.doi.org/10.1109/TCSI.2009.2016172
http://hdl.handle.net/11536/27654
ISSN: 1549-8328
DOI: 10.1109/TCSI.2009.2016172
期刊: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume: 56
Issue: 5
起始頁: 966
結束頁: 974
Appears in Collections:Conferences Paper


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