標題: Abnormal ESD failure mechanism in high-pin-count BGA packaged ICs due to stressing nonconnected balls
作者: Lo, WY
Ker, MD
電機學院
College of Electrical and Computer Engineering
關鍵字: ball grid array (BGA);charged-device model (CDM);electrostatic discharge (ESD);scanning electron microscopy (SEM);small capacitor method (SCM)
公開日期: 1-Mar-2004
摘要: An abnormal failure mechanism due to ESD pulse applied on the nonconnected (NC) solder balls of a high-pin-count (683 balls) BGA packaged chipset IC is presented. The ESD test results of the IC product were found below human-body-model (HBM) 2 kV when stressing all balls or only stressing NC balls, but above HBM 3 kV when stressing all balls excluding NC balls. Failure analyses, including scanning electron microscopy (SEM) photographs and the measurement of current waveforms during ESD discharging event, have been performed. With a new proposed equivalent model, a clear explanation on this unusual phenomenon is found to have a high correlation to the small capacitor method (SCM). Several solutions to overcome this failure mechanism are also discussed.
URI: http://dx.doi.org/10.1109/TDMR.2004.824362
http://hdl.handle.net/11536/27010
ISSN: 1530-4388
DOI: 10.1109/TDMR.2004.824362
期刊: IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Volume: 4
Issue: 1
起始頁: 24
結束頁: 31
Appears in Collections:Conferences Paper


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