標題: 0.13-mu m low-kappa-Cu CMOS logic-based technology for 2.1-Gb high data rate read-channel
作者: Guo, JC
Lien, WY
Tsai, TL
Chen, SM
Wu, CM
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: dual-gate oxide;high-performance analog (HPA);read-channel
公開日期: 1-五月-2004
摘要: High-performance analog/digital elements have been successfully fabricated bya 0.13-mum low-kappa-Cu logic-based mixed-signal CMOS process in a single chip to enable a 2.1-Gb/s read-channel for hard disk drives that is a record-high data rate supported by fully CMOS solution. The high-performance analog devices demonstrate superior drivability, matching, noise immunity, and reliability by a unique dual-gate oxide module to support the aggressive oxide thickness scaling and maintain promisingly good reliability in all aspects.
URI: http://dx.doi.org/10.1109/TED.2004.826884
http://hdl.handle.net/11536/26844
ISSN: 0018-9383
DOI: 10.1109/TED.2004.826884
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 51
Issue: 5
起始頁: 757
結束頁: 763
顯示於類別:期刊論文


文件中的檔案:

  1. 000221117300016.pdf