標題: A low-power ASIC design for cell search in the W-CDMA system
作者: Li, CF
Chu, YS
Sheen, WH
Tian, FC
Ho, JS
電信工程研究所
Institute of Communications Engineering
關鍵字: cell search;clock error;frequency error;low-power design;W-CDMA
公開日期: 1-May-2004
摘要: This paper presents a low-power ASIC design for cell search in the wideband code-division multiple-access (W-CDMA) system. A low-complexity algorithm that is able to work satisfactorily under the effect of large frequency and clock errors is designed first. Then, a set of low-power measures are employed in the design of hardware architecture and circuits. Finally, through power analysis, critical blocks are identified and redesigned so as to further reduce the power consumption. The final design shows that the power is reduced by 51 % from the original design of 133.6 mW to 65.49 mW, and its core area is also reduced by 31.9% from 3.4 x 3.4 mm(2) to 2.8 x 2.8 mm(2). The design is implemented and verified in a 3.3-V 0.35-mum CMOS technology with clock rate 1 36 MHz.
URI: http://dx.doi.org/10.1109/JSSC.2004.826337
http://hdl.handle.net/11536/26806
ISSN: 0018-9200
DOI: 10.1109/JSSC.2004.826337
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 39
Issue: 5
起始頁: 852
結束頁: 857
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