標題: A novel erase scheme to suppress overerasure in a scaled 2-bit nitride storage flash memory cell
作者: Yeh, CC
Wang, TH
Tsai, WJ
Lu, TC
Liao, YY
Chen, HY
Zous, NK
Ting, WC
Ku, J
Lu, CY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: band-to-band hot hole;flash memory cell;nitride trapping storage;overerasure
公開日期: 1-Sep-2004
摘要: The cause of over-erasure in a two-bit nitride storage Flash memory cell is investigated. Extra positive charges accumulated above the n(+) unction and channel-shortening enhanced drain-induced barrier lowering effect are found to be responsible for threshold voltage (V-t) lowering in an over-erased cell. A modified erase scheme is proposed to resolve this issue. By applying a source voltage during erase, the erase speed can be well controlled for cells with different channel lengths and a wide range of program-state Vt distribution, which will reduce overerasure significantly.
URI: http://dx.doi.org/10.1109/LED.2004.833596
http://hdl.handle.net/11536/26418
ISSN: 0741-3106
DOI: 10.1109/LED.2004.833596
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 25
Issue: 9
起始頁: 643
結束頁: 645
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