標題: PERFORMANCE AND OFF-STATE CURRENT MECHANISMS OF LOW-TEMPERATURE PROCESSED POLYSILICON THIN-FILM TRANSISTORS WITH LIQUID-PHASE DEPOSITED SIO2 GATE INSULATOR
作者: YEH, CF
LIN, SS
YANG, TZ
CHEN, CL
YANG, YC
電控工程研究所
Institute of Electrical and Control Engineering
公開日期: 1-二月-1994
摘要: Polysilicon thin-film transistors (poly-Si TFT's) with liquid phase deposition (LPD) silicon dioxide (SiO2) gate insulator were realized by low-temperature processes (< 620-degrees-C). The physical, chemical, and electrical properties of the new dielectric layer were clarified. The low-temperature processed (LTP) polylayer TFT's with W/L = 200 mum/10 mum had an on-off current ratio of 4.95 x 10(6) at V(D) = 5 V, a field effect mobility of 25.5 cm2/V.s at V(D) = 0.1 V, a threshold voltage of 6.9 V. and a subthreshold swing of 1.28 V/decade at V(D) = 0.1 V. Effective passivation of defects by plasma hydrogenation can improve the characteristics of the devices. The off-state current (I(L)) mechanisms of the tTP poly-Si TFT's were systematically compared and clarified. The I(L) is divided into three regions; the I(L) is attributable to a resistive current in region I (low gate bias), to pure thermal generation current in region II (low drain bias), and to Frenkel-Poole emission current in region III (high gate bias and drain bias).
URI: http://dx.doi.org/10.1109/16.277383
http://hdl.handle.net/11536/2623
ISSN: 0018-9383
DOI: 10.1109/16.277383
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 41
Issue: 2
起始頁: 173
結束頁: 179
顯示於類別:期刊論文


文件中的檔案:

  1. A1994NA21300007.pdf