Title: A CMOS 8-Bit 1.6-GS/s DAC With Digital Random Return-to-Zero
Authors: Tseng, Wei-Hsin
Wu, Jieh-Tsorng
Chu, Yung-Cheng
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Keywords: Current steering;digital-to-analog converter (DAC);digital random return-to-zero (DRRZ);return-to-zero (RZ)
Issue Date: 1-Jan-2011
Abstract: A digital random return-to-zero technique is presented to improve the dynamic performance of current-steering digital-to-analog converters (DACs). To demonstrate the proposed technique, a CMOS 8-bit 1.6-GS/s DAC was fabricated in a 90-nm CMOS technology. The DAC achieves a spurious-free dynamic range better than 60 dB for a sine-wave input up to 460 MHz and better than 55 dB up to 800 MHz. The DAC consumes 90 mW of power.
URI: http://dx.doi.org/10.1109/TCSII.2010.2092823
http://hdl.handle.net/11536/26111
ISSN: 1549-7747
DOI: 10.1109/TCSII.2010.2092823
Journal: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume: 58
Issue: 1
Begin Page: 1
End Page: 5
Appears in Collections:Articles


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