標題: Nanoflash device with self-aligned double floating gates using scanning probe lithography and tetramethylammonium hydroxide wet etching
作者: Sheu, JT
Chen, CC
You, KS
Tsai, ST
材料科學與工程學系奈米科技碩博班
Graduate Program of Nanotechnology , Department of Materials Science and Engineering
公開日期: 1-Nov-2004
摘要: We report a self-aligned technology for nanoflash devices with double floating gates using scanning probe lithography (SPL) technology and anisotropic wet etching. On a (110) SOI silicon wafer, along [001] and [111] directions, a silicon nanowire was generated through local oxidation with SPL followed by wet etching with tetramethylammonium hydroxide solution. Silicon nanowires (SiNW) with profiles of sidewall either sloped or vertical were formed after anisotropic etching in the [001] or [111] direction respectively. After deposition of a polysilicon film on the SiNW with low pressure chemical vapor deposition, nanostructures of a nanoflash device with polysilicon double-floating side gates were obtained along the [111] part of SiNW after reactive ion etching spacer etching. The silicon nanowire channel has a width of 20 nm and a height of 200 rim; the width of the self-aligned floating gate is approximately 40 rim. Silicon nitride was deposited to serve as gate dielectric. The top gate and source-drain aluminum pads were defined by photo litholgraphy. Electrical properties of such a nanoflash device with double-floating side gates are discussed. (C) 2004 American Vacuum Society.
URI: http://dx.doi.org/10.1116/1.1826060
http://hdl.handle.net/11536/25704
ISSN: 1071-1023
DOI: 10.1116/1.1826060
期刊: JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B
Volume: 22
Issue: 6
起始頁: 3154
結束頁: 3157
Appears in Collections:Conferences Paper


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