標題: Low voltage lead titanate/Si one-transistor ferroelectric memory with good device characteristics
作者: Sun, CL
Chen, SY
Liao, CC
Chin, A
材料科學與工程學系
電子工程學系及電子研究所
Department of Materials Science and Engineering
Department of Electronics Engineering and Institute of Electronics
公開日期: 15-十一月-2004
摘要: We have developed one-transistor ferroelectric memory using lead titanate (PTO) as a gate dielectric directly formed on Si without any buffer layer. The PTO/Si metal-oxide-semiconductor field-effect transistor memory has shown a large threshold voltage shift of 1.6 V at only +/-4 V program/erase voltages. The corresponding good interface was achieved by lowering the anneal temperature to 450 degreesC. Besides the sharp capacitance change of 0.17 muF/V cm(2), it was also evidenced by the high mobility of 169 cm(2)/V s close to high-kappa HfO2. In addition, long retention >1000 s and endurance >10(11) stress cycles in the device suggested good memory characteristics. (C) 2004 American Institute of Physics.
URI: http://dx.doi.org/10.1063/1.1814440
http://hdl.handle.net/11536/25638
ISSN: 0003-6951
DOI: 10.1063/1.1814440
期刊: APPLIED PHYSICS LETTERS
Volume: 85
Issue: 20
起始頁: 4726
結束頁: 4728
顯示於類別:期刊論文


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