|標題:||Testing Methods for a Write-Assist Disturbance-Free Dual-Port SRAM|
Chao, Mango C. -T.
National Chiao Tung University
Department of Electronics Engineering and Institute of Electronics
|摘要:||The recent research works of dual-port SRAM have focused on developing new write-assist techniques to suppress the potential inter-port write disturbance under low operating voltage and high process variation. However, the testing related issues induced by those newly proposed write-assist techniques have not been discussed yet in the previous literatures. In this paper, we first implemented a new write-assist dual-port SRAM proposed in  by using a 28nm LP process and then discussed the faulty behavior of injecting different resistive-open defects into both the SRAM cell and write-assist circuit. Next, we developed new test methods to detect the hard-to-detect resistive-open defects and proposed a corresponding March-like algorithm that covers a widely used March C-as well as the proposed test methods. Last, the required DfT for the proposed test methods was also discussed.|
|期刊:||2014 IEEE 32ND VLSI TEST SYMPOSIUM (VTS)|
|Appears in Collections:||Conferences Paper|