標題: A Retargetable Static Binary Translator for the ARM Architecture
作者: Shen, Bor-Yeh
Hsu, Wei-Chung
Yang, Wuu
資訊工程學系
Department of Computer Science
關鍵字: Design;Languages;Performance;Binary translation;compiler;retargeting;intermediate representation
公開日期: 1-Jun-2014
摘要: Machines designed with new but incompatible Instruction Set Architecture (ISA) may lack proper applications. Binary translation can address this incompatibility by migrating applications from one legacy ISA to a new one, although binary translation has problems such as code discovery for variable-length ISA and code location issues for handling indirect branches. Dynamic Binary Translation (DBT) has been widely adopted for migrating applications since it avoids those problems. Static Binary Translation (SBT) is a less general solution and has not been actively researched. However, SBT performs more aggressive optimizations, which could yield more compact code and better code quality. Applications translated by SBT can consume less memory, processor cycles, and power than DBT and can be started more quickly. These advantages are even more critical for embedded systems than for general systems. In this article, we designed and implemented a new SBT tool, called LLBT, which translates ARM instructions into LLVM IRs and then retargets the LLVM IRs to various ISAs, including x86, x86-64, ARM, and MIPS. LLBT leverages two important functionalities from LLVM: comprehensive optimizations and retargetability. More importantly, LLBT solves the code discovery problem for ARM/Thumb binaries without resorting to interpretation. LLBT also effectively reduced the size of the address mapping table, making SBT a viable solution for embedded systems. Our experiments based on the EEMBC benchmark suite show that the LLBT-generated code can run more than 6x and 2.3x faster on average than emulation with QEMU and HQEMU, respectively.
URI: http://dx.doi.org/10.1145/2629335
http://hdl.handle.net/11536/25095
ISSN: 1544-3566
DOI: 10.1145/2629335
期刊: ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
Volume: 11
Issue: 2
起始頁: 87
結束頁: 111
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