標題: Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer
作者: Hsieh, Ting-En
Chang, Edward Yi
Song, Yi-Zuo
Lin, Yueh-Chin
Wang, Huan-Chung
Liu, Shin-Chien
Salahuddin, Sayeef
Hu, Chenming Calvin
材料科學與工程學系
電子工程學系及電子研究所
Department of Materials Science and Engineering
Department of Electronics Engineering and Institute of Electronics
關鍵字: GaN;metal-insulator-semiconductor high electron-mobility transistor (MIS-HEMT);normally-OFF;gate recessed;gate insulator;threshold voltage hysteresis;Al2O3 and AlN;plasma enhanced atomic layer deposition (PE-ALD);interfacial passivation layer (IPL)
公開日期: 1-Jul-2014
摘要: In this letter, a gate recessed normally OFF AlGaN/GaN MIS-HEMT with low threshold voltage hysteresis using Al2O3/AlN stack gate insulator is presented. The trapping effect of Al2O3/GaN interface was effectively reduced with the insertion of 2-nm AlN thin interfacial passivation layer grown by plasma enhanced atomic layer deposition. The device exhibits a threshold voltage of +1.5 V, with current density of 420 mA/mm, an OFF-state breakdown voltage of 600 V, and high ON/OFF drain current ratio of similar to 10(9).
URI: http://dx.doi.org/10.1109/LED.2014.2321003
http://hdl.handle.net/11536/24913
ISSN: 0741-3106
DOI: 10.1109/LED.2014.2321003
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 35
Issue: 7
起始頁: 732
結束頁: 734
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