標題: A 2.56 Gb/s Soft RS (255,239) Decoder Chip for Optical Communication Systems
作者: Lin, Yi-Min
Hsu, Chih-Hsiang
Chang, Hsie-Chia
Lee, Chen-Yi
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Error correction code;optical communication;Reed-Solomon (RS) code
公開日期: 1-七月-2014
摘要: Due to high transmission rate requirement for optical communication systems, the growing uncertainty of received signals results in the limited transmission distance. In this paper, a decision-confined soft RS decoder chip is proposed to enhance the error correcting performance with area-efficient architectures. Instead of generating numerous possible candidate codewords and determining the most likely one as output codeword, our approach produces only one codeword by confining the degree of error location polynomial. Therefore, hardware complexity is significantly reduced by eliminating decision making unit. Moreover, an iteration-reduced RiBM algorithm is provided to enlarge the coding gain by using more least reliable positions (LRPs) in the limited operation latency. According to simulation results, our proposed soft RS (255, 239; 8) decoder with 5 LRPs outperforms 0.4 dB at 10(-4) codeword error rate (CER) as compared to hard RS decoders. Implemented in standard CMOS 90 nm technology, the soft decoder chip can achieve 2.56 Gb/s throughput with similar complexity as a hard decoder. It can fit well for 10-40 Gb/s with 16 RS decoders in optical fiber systems and 2.5 Gb/s GPON applications.
URI: http://dx.doi.org/10.1109/TCSI.2014.2298282
http://hdl.handle.net/11536/24906
ISSN: 1549-8328
DOI: 10.1109/TCSI.2014.2298282
期刊: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume: 61
Issue: 7
起始頁: 2110
結束頁: 2118
顯示於類別:期刊論文


文件中的檔案:

  1. 000339045500020.pdf