標題: Iterative Decoding Algorithms for a Class of Non-Binary Two-Step Majority-Logic Decodable Cyclic Codes
作者: Chang, Hsiu-Chi
Chang, Hsie-Chia
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Extended min-sum algorithm;majority-logic decoding;non-binary LDPC codes;cyclic codes
公開日期: 1-Jun-2014
摘要: This paper presents two iterative decoding algorithms for a class of non-binary two-step majority-logic (NB-TS-MLG) decodable cyclic codes. A partial parallel decoding scheme is also introduced to provide a balanced trade-off between decoding speed and storage requirements. Unlike non-binary one-step MLG decodable cyclic codes, the Tanner graphs of which are 4-cycle-free, NB-TS-MLG decodable cyclic codes contain a large number of short cycles of length 4, which tend to degrade decoding performance. The proposed algorithms utilize the orthogonal structure of the parity-check matrices of the codes to resolve the degrading effects of the short cycles of length 4. Simulation results demonstrate that the NB-TS-MLG decodable cyclic codes decoded with the proposed algorithms offer coding gains as much as 2.5 dB over Reed-Solomon codes of the same lengths and rates decoded with either hard-decision or algebraic soft decision decoding.
URI: http://dx.doi.org/10.1109/TCOMM.2014.2320508
http://hdl.handle.net/11536/24679
ISSN: 0090-6778
DOI: 10.1109/TCOMM.2014.2320508
期刊: IEEE TRANSACTIONS ON COMMUNICATIONS
Volume: 62
Issue: 6
起始頁: 1779
結束頁: 1789
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