標題: Investigation of gate-bias stress and hot-carrier stress-induced instability of InGaZnO thin-film transistors under different environments
作者: Hsieh, Tien-Yu
Chang, Ting-Chang
Chen, Te-Chih
Tsai, Ming-Yen
Chen, Yu-Te
Jian, Fu-Yen
Lin, Chia-Sheng
Tsai, Wu-Wei
Chiang, Wen-Jen
Yan, Jing-Yi
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Indium Gallium Zinc Oxide (IGZO);Thin film transistors (TFTs);Gate-bias stress;hot-carrier effect
公開日期: 1-Sep-2013
摘要: This paper investigates the temperature and ambiance effects on various reliability issues for InGaZnO thin film transistors with an organic passivation layer. Hot-carrier stress and gate-bias stress are carried out under different environmental temperatures and ambient gases. The device exhibits relatively good stability under room temperture, whereas high temperature enhances degradation. Futhermore, different degradation behaviors after gate-bias stress in atmosphere and in vacuum can be attributed to gas adsorption/desorption-induced instability. Moreover, capacitance-voltage measurement techinique is utilized to analyze the degradation mechanism and to extract the density of state (DOS). The result reveals that the threshold voltage shift after both hot-carrier and gate-bias stress originates from the charge-trapping effect at the interface of gate insulator and active layer, with the extra trap states generated during stress responsible for C-V curve distortion. In addition, the asymmetric degradation behavior of gate-to-drain capacitance (Cgd) and gate-to-source capacitance (Cgs) indicates that trap states are generated near the drain side. (C) 2012 Elsevier B.V. All rights reserved.
URI: http://dx.doi.org/10.1016/j.surfcoat.2012.10.030
http://hdl.handle.net/11536/23332
ISSN: 0257-8972
DOI: 10.1016/j.surfcoat.2012.10.030
期刊: SURFACE & COATINGS TECHNOLOGY
Volume: 231
Issue: 
起始頁: 478
結束頁: 481
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