標題: A LOW GLITCH 10-BIT 75-MHZ CMOS VIDEO D/A CONVERTER
作者: WU, TY
JIH, CT
CHEN, JC
WU, CY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-一月-1995
摘要: A low glitch 10-bit 75-MHz CMOS current-output video digital-to-analog converter (DAC) for high-definition television (HDTV) applications is described. In order to achieve monotonicity and low glitch, a special segmented antisymmetric switching sequence and an innovative asymmetrical switching buffer have been used. The video DAC has been fabricated by using 0.8 mu m single-poly double-metal CMOS technology. Experimental results indicated that the conversion rate is above 75 MHz, and nearly 50% of samples have differential and integral linearity errors less than 0.24 LSB and 0.6 LSB, respectively. The glitch has been reduced to be less than 3.9 pV.s and the settling time within +/- 0.1% of the final value is less than 13 ns. The video DAC is operated by a single 5 V power supply and dissipates 170 mW at 75 MHz conversion rate (140 mW in the DAC portion). The chip size of video DAC is 1.75 mm x 1.2 mm (1.75 mm x 0.7 mm for the DAC portion).
URI: http://dx.doi.org/10.1109/4.350191
http://hdl.handle.net/11536/2131
ISSN: 0018-9200
DOI: 10.1109/4.350191
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 30
Issue: 1
起始頁: 68
結束頁: 72
顯示於類別:期刊論文


文件中的檔案:

  1. A1995QB39600011.pdf