標題: Pulsed-Latch Replacement Using Concurrent Time Borrowing and Clock Gating
作者: Chang, Chih-Long
Jiang, Iris Hui-Ru
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Clock power;pulsed latches;time borrowing
公開日期: 1-二月-2013
摘要: Flip-flops are the most common form of sequencing elements; however, they have a significantly higher sequencing overhead than latches in terms of delay, power, and area. Hence, pulsed latches are a promising option to reduce power for high-performance circuits. In this paper, to save power and compensate for timing violations, we fully utilize the intrinsic time borrowing property of pulsed latches and consider clock gating during pulsed-latch replacement. Experimental results show that our approach can generate very power efficient results.
URI: http://dx.doi.org/10.1109/TCAD.2012.2234828
http://hdl.handle.net/11536/21255
ISSN: 0278-0070
DOI: 10.1109/TCAD.2012.2234828
期刊: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Volume: 32
Issue: 2
起始頁: 242
結束頁: 246
顯示於類別:期刊論文


文件中的檔案:

  1. 000314677400007.pdf