標題: SILICIDE-CAUSED ANOMALOUS REVERSE CURRENT-VOLTAGE CHARACTERISTICS OF COSI2 SHALLOW P(+)N JUNCTIONS
作者: JUANG, MH
LIN, CT
CHENG, HC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-一月-1995
摘要: Silicided shallow p (+) n junctions formed by BF2+ implantation into thin Co films on Si substrates to a low dosage (5 x 10(14) cm(-2)) and subsequent rapid thermal annealing (RTA) or conventional furnace annealing (CFA) are used to show the impact of silicides on junction characteristics. CFA results in a lower leakage than RTA at a low bias as 5 V at high temperatures attributable to longer annealing time. All the diodes made by RTA exhibit a hard-breakdown behavior. For CFA 700 degrees C annealing, however, an anomalously poor reverse I-V behavior indicative of athermal emission is found at high bias. In addition, the 800 degrees C-formed diodes and the CFA-treated 1x10(16) cm(-2) implanted samples show good reverse characteristics even at high bias. As a result, annealing conditions should be properly chosen to reduce the impact of silicides on shallow junctions.
URI: http://hdl.handle.net/11536/2120
ISSN: 0038-1101
期刊: SOLID-STATE ELECTRONICS
Volume: 38
Issue: 1
起始頁: 101
結束頁: 103
顯示於類別:期刊論文


文件中的檔案:

  1. A1995QC42000014.pdf