標題: Characteristic of p-Type Junctionless Gate-All-Around Nanowire Transistor and Sensitivity Analysis
作者: Han, Ming-Hung
Chang, Chun-Yen
Jhan, Yi-Ruei
Wu, Jia-Jiun
Chen, Hung-Bin
Cheng, Ya-Chi
Wu, Yung-Chun
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Gate-all-around (GAA);junctionless (JL);nanowire transistor;sensitivity
公開日期: 1-二月-2013
摘要: The characteristics and sensitivities of p-type junctionless (JL) gate-all-around (GAA) (JLGAA) nanowire transistors are demonstrated by simulating a 3-D quantum transport device with a view to their use in CMOS technology. The concentration of dopants in a p-type JL nanowire transistor is not as high as that in an n-type device owing to solid solubility of boron in silicon. However, we can use a midgap material as gate electrode to design an appropriate device threshold voltage. The p-type JLGAA transistor exhibits a favorable on/off current ratio and better short-channel characteristics than a conventional inversion-mode transistor with a GAA structure. Sensitivity analyses reveal that the channel thickness and random dopant fluctuation substantially affect the device performance in terms of threshold voltage (V-th), on current (I-on), and subthreshold slope because of the full depletion condition of the channel. The channel length and oxide thickness have less impact because the short-channel effect is well controlled.
URI: http://dx.doi.org/10.1109/LED.2012.2229105
http://hdl.handle.net/11536/21018
ISSN: 0741-3106
DOI: 10.1109/LED.2012.2229105
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 34
Issue: 2
起始頁: 157
結束頁: 159
顯示於類別:期刊論文


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  1. 000314173200003.pdf