標題: Experimental Results of Testing a BIST epsilon-Delta ADC on the HOY Wireless Test Platform
作者: Hung, Shao-Feng
Hong, Hao-Chiao
電機資訊學士班
電控工程研究所
Undergraduate Honors Program of Electrical Engineering and Computer Science
Institute of Electrical and Control Engineering
關鍵字: Analog-to-digital converter (ADC);Built-in self-test (BIST);Design-for-testability (DfT);Sigma-Delta modulation;Analog and mixed-signal test;Wireless test
公開日期: 1-十月-2012
摘要: High pin count packaging and 3D IC technology make testing such advanced ICs more and more difficult and expensive. The HOY wireless test platform provides an alternative and cost-effective test solution to address the poor accessibility and high test cost issues. The key idea is implementing a low-cost and short-distance wireless transceiver on chip so that all test instructions and data can be transmitted without physical access. Due to the limited wireless bandwidth, all modules in the device under test (DUT) are preferred to have some built-in self-test (BIST) features. Prior works successfully demonstrated that DUTs with memory and digital circuits can be tested on the low-cost wireless test platform. However, there is no example to show if it is also possible to test the DUT embedded with analog circuits on the HOY test platform. This paper demonstrates the first system-level integration including hardware and software for testing a fully-integrated BIST ADC on the HOY wireless test platform. The DUT chip fabricated in 0.18-mu m CMOS consists of a second-order I -I" pound ADC under test (AUT) and the BIST circuitry. The AUT design employs the decorrelating design-for-digital-testability ((DT)-T-3) scheme to make itself digitally testable. The BIST design is based on the modified controlled sine wave fitting (CSWF) method. The required BIST circuits are purely digital and as small as 9.9k gates. The gate count of the HOY test wrapper is less than 1k. Experimental results obtained by the HOY wireless test platform show that the AUT achieves a dynamic range of 85.1 dB and a peak SNDR of 78.6 dB. The wireless test results show good agreement with those acquired by conventional analog tests.
URI: http://dx.doi.org/10.1007/s10836-012-5302-7
http://hdl.handle.net/11536/20687
ISSN: 0923-8174
DOI: 10.1007/s10836-012-5302-7
期刊: JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS
Volume: 28
Issue: 5
起始頁: 571
結束頁: 584
顯示於類別:期刊論文


文件中的檔案:

  1. 000310955700004.pdf