標題: Novel 2-Bit/Cell Wrapped-Select-Gate SONOS TFT Memory Using Source-Side Injection for NOR-Type Flash Array
作者: Wang, Kuan-Ti
Hsueh, Fang-Chang
Lu, Yu-Lun
Chiang, Tsung-Yu
Wu, Yi-Hong
Liao, Chia-Chun
Yen, Li-Chen
Chao, Tien-Sheng
電子物理學系
Department of Electrophysics
關鍵字: Source-side injection (SSI);thin-film transistor memory;two-bit/cell;wrapped-selected-gate (WSG)-SONOS
公開日期: 1-Jun-2012
摘要: This letter is the first to successfully demonstrate the 2-bit/cell wrapped-selected-gate (WSG) SONOS thin-film transistor (TFT) memory using source-side injection (SSI). Because of the higher programming efficiency of SSI, a memory window of approximately 3 V can be easily achieved in 10 mu s and 30 ms for the program and erase modes, respectively. In addition, we performed an excellent 2-bit/cell distinguish margin for 3-V memory window in WSG-SONOS TFT memory. The optimal reliability of the endurance and data retention tests can be executed by adjusting the applied voltage appropriately.
URI: http://dx.doi.org/10.1109/LED.2012.2192090
http://hdl.handle.net/11536/20520
ISSN: 0741-3106
DOI: 10.1109/LED.2012.2192090
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 33
Issue: 6
起始頁: 839
結束頁: 841
Appears in Collections:Articles