標題: The performance and reliability enhancement of ETOX P-channel flash EEPROM cell with P-doped floating-gate
作者: Tsai, HW
Chiang, PY
Chung, SS
Kuo, DS
Liang, MS
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2003
摘要: In this paper, we proposed a simple approach for designing reliable and high performance p-channel Flash EEPROM cell from the floating-gate engineering point of view. In other words, a p-type doped floating gate used in a p-channel flash cell can achieve this goal. Results show that the programming speed, gate/drain disturb, read lifetime, and data retention in p-type floating-gate cell are much better than those of n-type floating-gate cell; except that p-type floating-gate cell has slower erasing speed. These results can be used as a guideline for designers to choose.
URI: http://hdl.handle.net/11536/18558
http://dx.doi.org/10.1109/VTSA.2003.1252545
ISBN: 0-7803-7765-6
DOI: 10.1109/VTSA.2003.1252545
期刊: 2003 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS, PROCEEDINGS OF TECHNICAL PAPERS
起始頁: 36
結束頁: 39
顯示於類別:會議論文


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  1. 000189391000010.pdf