標題: High linear voltage references for on-chip CMOS temperature sensor
作者: Tsai, Joseph Tzuo-Sheng
Chiueh, Herming
電信工程研究所
Institute of Communications Engineering
公開日期: 2006
摘要: High linear voltage reference circuitry is designed and implemented in TSMC 0.13 mu m and 0.18 mu m CMOS technology. Previous research has proposed the use of MOS transistors operating in the weak inversion region to replace the bipolar devices in conventional PTAT (proportional to absolute temperature) circuits. However, such solutions often have linearity problem in high temperature region due to the current leaking devices in modern deep sub micron and nano-scale CMOS technology. The proposed circuit utilized temperature complementation technique on two voltage references, PTAT and IOAT (independent of absolute temperature) references, to enhance the linearity and produce a more stable IOAT voltage reference. Base on the simulation results, the R-squares of both circuitries are better than 0.999 in a considerable wider temperature range from -55 degrees C to 170 degrees C. Thus, a fully integrated temperature sensor with wider temperature range is designed and easily to integrate to modern system-on-chip designs with minimal efforts.
URI: http://hdl.handle.net/11536/17419
http://dx.doi.org/10.1109/ICECS.2006.379764
ISBN: 978-1-4244-0394-3
DOI: 10.1109/ICECS.2006.379764
期刊: 2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3
起始頁: 216
結束頁: 219
Appears in Collections:Conferences Paper


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