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dc.contributor.authorLin, Shih Pingen_US
dc.contributor.authorLee, Chung Lenen_US
dc.contributor.authorChen, Jwu E.en_US
dc.contributor.authorChen, Ji-Janen_US
dc.contributor.authorLuo, Kun-Lunen_US
dc.contributor.authorWu, Wen-Chingen_US
dc.date.accessioned2014-12-08T15:24:52Z-
dc.date.available2014-12-08T15:24:52Z-
dc.date.issued2006en_US
dc.identifier.isbn978-1-4244-0291-5en_US
dc.identifier.issn1089-3539en_US
dc.identifier.urihttp://hdl.handle.net/11536/17287-
dc.description.abstractThe random-like filling strategy pursuing high compression for scan test introduces large test power. To pursue high compression in conjunction with reducing test power for multiple scan chain designs is even harder and very few works were dedicated to solve this problem. This paper proposes and demonstrates a Multilayer Data Copy (MDC) scheme for test compression as well as test power reduction for multiple scan designs. The scheme utilizes a buffer, which supports fast load using previous loaded data, to achieve test data compression and test power reduction at the same time. The scheme can be applied ATPG-independently or to be incorporated in an ATPG to generate highly compressible and power efficient test sets. Experiment results on benchmarks show that test sets generated by the scheme had large compression and power saving with little area design overhead.en_US
dc.language.isoen_USen_US
dc.titleA multilayer data copy scheme for low cost test with controlled scan-in power for multiple scan chain designsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2006 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2en_US
dc.citation.spage666en_US
dc.citation.epage673en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000245118400074-
Appears in Collections:Conferences Paper